transistor gate

英 [trænˈzɪstə(r) ɡeɪt] 美 [trænˈzɪstər ɡeɪt]

网络  晶体管门; 晶体管栅极; 晶体管门电路

计算机



双语例句

  1. The transistor floating gate technology used is already at scaling limits and pushing it farther is leading to lower reliability, so although it has been a stop-gap for data-centric computing, it is likely not the solution.
    使用的晶体管浮栅技术的应用已达到扩展极限,进一步扩展将会导致可靠性降低,所以,尽管这是一个权宜之计,以便使用进行以数据为中心的计算,但这可能并不是解决方案。
  2. The second feeds-back the current from a TFT geometrically matched to the drive transistor ( known as a current mirror) and driven off the same gate voltage.
    第二个来自一个TFT的电流回授,能够几何地符合驱动电晶体(又称为一个电流反射)并远离相同的闸极(输出)电压。
  3. The transistor gate has a distinct advantage over the diode gate in that the transistor amplifies, as well as acts as a gate.
    晶体管门电路比起二极管门电路来有一个显著的优点,那就是晶体管除了起门的作用外还能够放大。
  4. In CMOS, the logic of a conventional transistor gate is defined by the wiring and is therefore fixed.
    在cmos里,传统电晶体闸的逻辑是由接线所决定,因此是固定的。
  5. A transistor with a thin gate oxide being driven by too high of a voltage.
    一个用薄栅氧化层电晶体被太多的驱动电压高。
  6. Diode transistor logic gate
    二极管晶体管逻辑门
  7. A radiation hardened N channel Si power device& VDMNOSFET ( Vertical Double Diffused Metal Nitride Oxide Semiconductor Field Effect Transistor) is fabricated by using a double layer ( Si 3N 4 SiO 2) gate dielectric and a self aligned heavily doped shallow P+ region.
    采用Si3N4-SiO2双层栅介质及自对准重掺杂浅结P+区研制出了一种抗辐射加固功率器件&VDMNOS-FET(垂直双扩散金属-氮化物-氧化物-半导体场效应晶体管)。
  8. The annealing characteristics under different conditions after 60 Co γ ray irradiation for rad hard 4007 NMOS transistor are explored, the irradiation sensitive parameters are investigated along with the radiation dose, annealing temperature and gate bias.
    探讨了加固型CC4007经60Coγ射线辐照后NMOS晶体管的退火特性,研究了辐照敏感参数随辐照剂量、退火温度、退火时间和退火偏置的变化关系。
  9. The neuron MOS transistor was invented in 1991.It is a high functional floating gate MOS transistor with multiple input control gates.
    神经MOS晶体管是1991年发明出来的一种具有高功能度的多输入栅控制的浮栅MOS器件。
  10. Preparation and Characteristics of Organic Semiconductor Static Induction Transistor Using Thin Film Al Gate
    薄膜铝栅极有机半导体静电感应三极管的试制及动作特性
  11. A GaAs-based resonant tunneling transistor with a gate structure ( GRTT) has been designed and fabricated successfully for the first time in mainland China.
    在研制RTD经验的基础上设计并研制成功栅型GaAs基共振隧穿晶体管(GRTT)。
  12. This paper presents the principle of High Temperature Oxide Superconductors FieldEffect Transistor ( HTOSs-MOSuFET) using gate controlled critical temperature Tc.
    本文提出了栅控超导临界温度Tc的高温氧化物超导体场效应晶体管(HTOSs-MOSuFET)的原理。
  13. Characteristics analysis and practical application of double pole transistor with insulated gate pole
    大功率绝缘门极双极晶体管的特性分析与实际应用
  14. Studies on Characteristics of Ferroelectric Field Effect Transistor with Bi_4Ti_3O_ ( 12) Gate on Si Substrates
    Bi4Ti3O(12)栅Si基铁电场效应晶体管特性研究
  15. The static induction transistor with Schottky gate and sandwich structure of Au/ CuPc/ Al/ CuPc/ Au using organic semiconductor material copper phthalocyanine was discussed.
    介绍了由有机半导体材料酞菁铜制作的具有Au/CuPc/Al/CuPc/Au三明治结构的肖特基型栅极有机静电感应三极管。
  16. The main work of this thesis analyzes the organic static induction transistor's operational mechanism, and researchs the change of gate length, change of gate-drain distance and change of electric channel breadth for operational characteristics influence of organic static induction transistor.
    本论文的主要工作是解析有机静电感应三极管的工作机理,并研究了栅极长度变化、栅漏极间距变化和导电沟道的宽度变化对有机静电感应三极管工作特性的影响。
  17. A static shielding transistor ( gate associated transistor, GAT) is presented in the pa-per. The device has the advantages of high breakdown voltage, fast switching speed and low satura-tion voltage drop as well as the improved reliability.
    本文介绍了静电屏蔽晶体管(GAT)的结构与器件性能,该器件具有高耐压,高速和低饱和压降等优良特性。
  18. Based on the I-U characteristics of single-electron transistor ( SET) and the concepts of CMOS digital circuits design, a sort of logic gate is proposed.
    基于单电子晶体管(SET)的I_U特性和CMOS数字电路设计思想,提出了一类互补型SET逻辑门。
  19. Consequently, T-shaped struc-ture which have a large cross-sectional area but a short footprint has been applied for the fabri-cation of PHEMT device, because it is effective in reducing transistor noise due to gate parasitic resistance.
    为了解决这个问题,一种具有大截面面积而底部长度却很小的T形栅结构通常被用于制作PHEMT器件,因为这种结构可以有效地减少由于栅寄生电阻而引起的晶体管噪声。
  20. The experimental results show that insufficient field implant doses for H-gate pMOSFETs devices will lead to an observable edge back-gate transistor and obvious subthreshold leakage current of the device under a higher back gate bias.
    实验结果表明不足的边缘注入将会产生边缘背栅寄生晶体管,并且在高的背栅压下会产生明显的泄漏电流。
  21. The n-InGaP/ p-GaAs/ n-GaAs negative differential resistance heterojunction bipolar transistor with resistive gate structure ( RGNDRHBT) is designed and fabricated successfully.
    设计并研制成功了具有电阻栅结构的n-InGaP/p-GaAs/n-GaAs负阻异质结双极晶体管。
  22. High Temperature Oxide Superconductors Field Effect Transistor Using Gate Controlled Critical Temperature T_c
    栅控Tc的高温氧化物超导体场效应晶体管
  23. A theoretical analysis of a remote gate quantum transistor and a middle gate quant(?)
    对两种T型电子波导器件即遥控栅量子晶体管和中间栅量子晶体管进行了理论研究。
  24. A two dimensional numerical simulation for NMOSFET with lateral parasitic transistor is presented. The influences of three key parameters such as the doping level, gate bias during irradiation, the bird's beak shape on NMOSFET are studied for total dose radiation hardening performance.
    对具有侧向寄生晶体管的NMOSFET进行二维数值模拟,探讨了掺杂浓度、辐照偏压以及鸟嘴形状3个关键参数对于器件抗总剂量辐射加固性能的影响。
  25. IGBT ( Insulate Gate Bipolar Transistor) enhances the performance index and the energy saving for the entire machine system.
    绝缘栅双极晶体管(InsulateGateBipolarTransistor,IGBT)作为新型电力电子器件是整机系统提高性能指标和节能指标的首选产品。
  26. A Schottky gate resonant tunneling transistor ( RTT) is fabricated. The gate is formed by electroplating Pt/ Au onto the side of an double barrier structure.
    已研制成了肖特基栅共振隧穿晶体管,在双势垒结构上蒸发铂金形成栅。
  27. The composite insulated Gate Bipolar Transistor model. Gate TurnOff Thyristor model and MOSFET Control Thyristor model are presented as examples of the composite model method, together with simulations and experimental results.
    作为应用组合模型原理的实例,文中给出了组合绝缘门根晶体管模型、组合门极可关断晶闸管模型和组合MOSFET控制晶闸管模型,并和实际器件进行比较。
  28. The advanced technologies have improved transistors switching rate, and reduced transistor gate delay. However, signal transmission and power consumption are getting worse due with the global wire delay.
    先进微电子与半导体工艺技术极大地提升了晶体管翻转速度,降低了门延时,但是芯片中全局线时延导致的信号传输与功耗问题却变得越来越糟糕。
  29. By sampling the output voltage, the system can control the oscillator frequency to stabilize the output current; or according the feedback voltage, the system can decide the number of skip cycle of the power transistor gate signal to stabilize the output voltage.
    系统通过对输出电压的反馈采样,控制内部振荡器的频率,使输出电流恒定;或根据反馈电压,调整功率管栅信号的跳周期个数,使输出电压恒定。
  30. In the fabrication of integrated circuits ( IC), the transistor is basic device, and its self-aligned structure and process formation technology of gate and source/ drain is the key part of IC manufacturing.
    在集成电路制造领域,晶体管是电路中应用最主要的器件之一,而它的自对准源漏栅工艺是晶体管制造的关键。